This invention relates to local interconnects and SRAM local interconnects including methods of manufacture thereof, and to methods of fabricating integrated circuitry comprising an SRAM cell having a local interconnect and having circuitry peripheral to the SRAM cell, and to methods of forming contact plugs, including by way of example only in embedded memory, SRAM peripheral circuitry, DRAM cell and peripheral circuitry, and logic circuitry.
The reduction in memory cell and other circuit size in high density dynamic random access memories (DRAMs) and other circuitry is a continuing goal in semiconductor fabrication. Implementing electric circuits involves connecting isolated devices through specific electric paths. When fabricating silicon and other semiconductive materials into integrated circuits, conductive devices built into semiconductive substrates typically need to be isolated from one another. Such isolation typically occurs in the form of either trench and refill field isolation regions or LOCOS grown field oxide.
Conductive lines, for example transistor gate lines, are formed over bulk semiconductor substrates. Some lines run globally over large areas of the semiconductor substrate. Others are much shorter and associated with very small portions of the integrated circuitry. Traditional local interconnects are formed using processing which includes chemical mechanical polishing of tungsten or other metals, and silicide processing. This invention was principally motivated in making processing improvements in the fabrication of local interconnects, and particularly in the fabrication of SRAM circuitry local interconnects and embedded technologies, although the invention is not so limited.
The invention includes local interconnects and SRAM local interconnects including methods of manufacture thereof, and methods of fabricating integrated circuitry comprising an SRAM cell having a local interconnect and having circuitry peripheral to the SRAM cell, and methods of forming contact plugs. In one implementation, a substrate is provided which has at least two nodes to be electrically connected. A first conductivity type semiconductive material is formed over and in electrical connection with one of the nodes. A conductive diffusion barrier material is formed over and in electrical connection with the first conductivity type semiconductive material. A second conductivity type semiconductive material is formed over and in electrical connection with the first conductivity type semiconductive material through the conductive diffusion barrier material, and over and in electrical connection with another of the nodes. The first conductivity type semiconductive material, the conductive diffusion barrier material, and the second conductivity type semiconductive material are formed into a local interconnect electrically connecting the one node and the another node. Local interconnects fabricated by this and other methods within and beyond this document are also contemplated.
In one implementation, a method of forming contact plugs includes providing a substrate having a plurality of first conductivity type nodes and a plurality of second conductivity type nodes. An insulative layer is provided over the substrate. First contact openings are formed through the insulative layer to the first conductivity type nodes. A first conductivity type semiconductive material is formed within the first contact openings in electrical connection with the first conductivity type nodes. Second contact openings are formed through the insulative layer to the second conductivity type nodes. A conductive diffusion barrier material is formed within the second contact openings in electrical connection with the second conductivity type nodes and in electrical connection with the first conductivity type semiconductive material received within the first contact openings. A second conductivity type semiconductive material is formed within the second contact openings in electrical connection with the second conductivity type nodes through the conductive diffusion barrier material, and over and in electrical connection with the first conductivity type semiconductive material through the conductive diffusion barrier material within the first contact openings over the first conductivity type nodes.